代做COMPSCI 4043 Systems and Networks调试SPSS

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Systems and Networks

COMPSCI 4043

Monday 13th December 2021

1. (a) Express the following in 16-bit two’s complement representation, giving your answers in hexadecimal. Show your working.

i. 2056 ii. -2056 [4]

(b) Write a segment of Sigma 16 code (not a complete program) to swap the contents of registers R1 and R2, using R3 as a temporary holding register.

Supposing none of the registers R3 to R15 are free. How would you now swap R1 and R2 in the most efficient manner? What is the additional overhead in memory cycles? [6]

$FF02, at the beginning of the assembly language instead of the end. What will happen when the program runs? [3]

(d) A Sigma16 system has two arrays, X and Y, of seven 16-bit signed numbers (each) in memory. Write an assembly language program to overwrite array X so that X[i] is formed from the larger of the ith elements of X and Y, i.e. xi = max(xi, yi) [7]

For reference, here is part of the instruction set of the Sigma16 CPU.

lea	Rd, x[Ra]	Rd:= x +Ra
load	Rd, x[Ra]	Rd:= mem[x +Ra]
store	Rd, x[Ra]	mem[x +Ra]:=Rd
add	Rd,Ra,Rb	Rd:= Ra+Rb
sub	Rd,Ra,Rb	Rd:= Ra-Rb
mul	Rd,Ra,Rb	Rd:= Ra*Rb
div	Rd,Ra,Rb	Rd:= Ra/Rb, R15:=Ra mod Rb
and	Rd,Ra,Rb	Rd:= Ra AND Rb
inv	Rd,Ra,Rb	Rd:= NOT Ra
or	Rd,Ra,Rb	Rd:= Ra OR Rb
xor	Rd,Ra,Rb	Rd:= Ra XOR Rb
cmplt	Rd,Ra,Rb	Rd:= Ra<Rb
cmpeq	Rd,Ra,Rb	Rd:= Ra=Rb
cmpgt	Rd,Ra,Rb	Rd:= Ra>Rb
shiftl	Rd,Ra,Rb	Rd:=Ra logic shifted left Rb places
shiftr	Rd,Ra,Rb	Rd:=Ra logic shifted right Rb places
jumpf	Rd, x[Ra]	If Rd=0 then PC:=x+Ra
jumpt	Rd, x[Ra]	If Rd<>0 then PC:=x+Ra
jal	Rd, x[Ra]	Rd:= pc, pc: =x +Ra
trap	Rd,Ra,Rb	PC:= interrupt handler
jump	x[Ra]	PC:= x +Ra

2 (a) List 3 similarities and 3 differences between an interrupt and a reset. [6]

(b) The following Sigma 16 code is intended to take a 10-element array of two’scomplement numbers (only first element is shown) and replace all the elements with their cubes (X[i] is replaced by X[i]*X[i]*X[i]).

However, although the code will assemble, it contains several errors.

i. Draw up a register use table for the program (suitable for inclusion as comment).

ii. Identify the errors and explain how you would correct them.

iii. Write out the corrected program.

LEA R1,1[R0] ;Set R1 to constant 1

LOAD R2,0[R0] ;i:=0

LOAD R3,n[R0] ;Set R3 to n

FORLOOP CMPLT R14,R3,R2 ;Is i<n

JUMPF R14,OUT[R0] ;if yes, exit

LOAD R4,X[R2] ;load X[i]

MUL R4,R4,R4 ;R4= X[i]*X[i]

MUL R4,R4,R4 ;R4 = -X[i]*X[i]

ADD R2,R2,R1 ;i:=i+1

STORE R4,X[R2] ;X[i]=--X[i]*X[i]

JUMP FORLOOP[R0] ;loop

OUT TRAP R0,R0,R0

; Data Area

n DATA 10

X DATA -8

DATA ... [6]

(d) In the corrected program estimate the advantage a system with a cache memory would gain if a primary memory cycle takes 10ns and a cache cycle, 1ns. [4]

3. (a) Explain what is meant by a memory fault exception and explain why it is sometimes desirable to recover from such an event and other times inappropriate to do so. [5]

(b) The Motorola MC68000, the microprocessor used in the first Macintosh computers, could have

memory faults signalled via a single hardware input wire (called “Bus Error”) but was unable to recover from such faults even when recovery might have been appropriate. Discuss what features a CPU must have to allow it to recover from a memory fault and explain why the 68000 would therefore not have been able to run an operating system with modern memory management. [5]

applications use unreliable transport, like UDP, and why forcing such applications to use reliable transport, like TCP, would be potentially detrimental. [5]

(d) Nonetheless in some circumstances, video and audio applications do use the reliable transport

protocol, TCP for other reasons (for example if firewalls don’tallow alternatives). Discuss how the detrimental issues identified in (c) might be mitigated and discuss whether such mitigation might be more appropriate in some cases than in others. [5]